† Corresponding author. E-mail:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61604106, 61774012, and 61901010), the Beijing Future Chip Technology High Precision Innovation Center Research Fund, China (Grant No. KYJJ2016008), the Beijing Municipal Natural Science Foundation, China (Grant No. 4192014), and the Municipal Natural Science Foundation of Shangdong Province, China (Grant No. ZR2014FL025).
The effects of buried oxide (BOX) layer on the capacitance of SiGe heterojunction photo-transistor (HPT), including the collector–substrate capacitance, the base–collector capacitance, and the base–emitter capacitance, are studied by using a silicon-on-insulator (SOI) substrate as compared with the devices on native Si substrates. By introducing the BOX layer into Si-based SiGe HPT, the maximum photo-characteristic frequency ft,opt of SOI-based SiGe HPT reaches up to 24.51 GHz, which is 1.5 times higher than the value obtained from Si-based SiGe HPT. In addition, the maximum optical cut-off frequency fβ,opt, namely its 3-dB bandwidth, reaches up to 1.13 GHz, improved by 1.18 times. However, with the increase of optical power or collector current, this improvement on the frequency characteristic from BOX layer becomes less dominant as confirmed by reducing the 3-dB bandwidth of SOI-based SiGe HPT which approaches to the 3-dB bandwidth of Si-based SiGe HPT at higher injection conditions.
In recent years, optical information transmission technology is a growing area of research interest for developing the high-speed telecommunications and data exchange and computing. In the fields of optical communication, optical interconnection and other relative fields, there have been growing the demands for high performance components and modules.[1,2] As one of the core components, the photodetector plays a decisive role in the whole system.[3] At present, vertical Si-based SiGe heterojunction photo-transistor (HPT), one of the important optical receivers, possesses a variety of advantages such as low power consumption, low cost and high compatibility with complementary metal–oxide–semiconductor (CMOS) technology.[4–6] Recently, research interest turned to improving the responsivity and working speed of SiGe HPT. However, due to the existence of junction capacitance and the slow-photon-generated carriers in the Si substrate, the working speed of the device is greatly limited.[7–11]
To improve the working speed of the Si-based SiGe HPT, a buried oxide (BOX) layer is introduced into its collector in this paper. Due to the existence of series capacitance of BOX layer, the collector–substrate capacitance, the base–collector junction capacitance as well as the base–emitter junction capacitance are reduced to a certain degree. Moreover, the BOX layer will isolate the slow carriers in the silicon substrate. Therefore the working speed of SOI-based SiGe HPT is predicted to be faster than that of SiGe HPT on native Si substrates.
Figure
Figure
For SOI-based SiGe HPT, the collector–substrate capacitor Ccs is composed of BOX capacitor Cox and BOX-substrate capacitor Ccs-sub. These two capacitors are in series connection electrically and so the total capacitance of Ccs must be smaller than that of either of them. Meanwhile, the Ccs of Si-based SiGe HPT is only the collector–substrate capacitance and it will be larger than the total series capacitance of the SOI-based SiGe HPT.
For an SOI-based SiGe HBT, the introduction of the BOX layer will reduce the electron concentration of the sub collector near the BOX layer and then results in a bigger sub-collector resistance.[12] The electron concentration in sub-collector of SOI-based SiGe HBT, SOI-based SiGe HPT and Si-based SiGe HPT are shown in Fig.
Figure
The base–collector capacitance Cbc consists of barrier capacitance CTC and diffusion capacitance CDC. As the base–collector of SiGe HPT works at reverse bias, the diffusion capacitance CDC can be ignored. Therefore only the barrier capacitance needs considering. The barrier capacitance CTC can be expressed as[14]
As the HPT device is exposed to light incidence, there are photon-generated carriers in the collector region. Because of the low mobility of holes, photon-generated holes accumulate at the interface of collector depletion region, which induces the space charge effect, especially under high collector current.[15] Thus the photon-generated voltage of base–collector Vbc.opt increases, causing the value of Cbc to increase.
As described above, the presence of BOX layer is beneficial to improving the light absorption efficiency. Then, SOI-based SiGe HPT will generate more photon-generated holes in collector region than Si-based SiGe HPT, the space charge effect of SOI-based SiGe HPT is more serious than that of Si-based SiGe HPT. Thus, as shown in Fig.
For the reduction of Cbc in SOI-based SiGe HPT at low collector current, the serial BOX layer capacitance Cox should be considered. When the collector current is low, the hole accumulation at the interface of depletion region of collector is small and the space charge effect is not significant. From Fig.
The base–emitter capacitance Cbe consists of barrier capacitance CTE and diffusion capacitance CDE. As the built-in voltage of space charge region Vbi is about 1.1 V, which is close to the applied voltage VBE of 1 V in normal operation, only the diffusion capacitance CDE needs considering. The CDE can be expressed as[16]
Figure
After introducing BOX layer into Si-based SiGe HPT, there are always a lot interface states at Si/SiO2 interface and many trap charges in BOX layer. Both become the recombination centers and then increase the recombination rate of carriers, reduce their lifetimes and further reduce their diffusion lengths. As a consequence, the SOI-based SiGe HPT has more recombination centers and the carrier diffusion length is shorter than the Si-based SiGe HPT. Therefore, the base–emitter diffusion capacitance of SOI-based SiGe HPT is always smaller than that of Si-based SiGe HPT.
To analyze the frequency performance of SOI-based SiGe HPT, a two-dimensional (2D) simulation model is built with TCAD software Silvaco. The basic semiconductor equations, including Poisson equation, carrier continuity equation and carrier transport equation, are solved with Newton iteration and Gummel iteration through simulations. In this model, the mobility model consists of concentration-dependent mobility (conmob) model and parallel electric field-dependent mobility (fldmob) model. Considered in the recombination model are the optical recombination, the Auger recombination, the Shockley–Read–Hall (SRH) recombination, as well as trap and surface recombination. In the carrier statistical model adopted are the Fermidirac model and band gap narrowing (BGN) model. In addition, the current boundary condition of the electrode and the Dirichlet boundary condition between the electrode and the semiconductor are also considered. The simulation data under bias condition of Vce = 5.0 V and Vbe = 1.0 V are presented in Fig.
The Si-based SiGe HPT in Ref. [7] is also simulated by using this 2D simulation model. The maximum ft,opt of Si-based SiGe HPT is 957 MHz, which is a little larger than the measurement result (728 MHz) because some inevitable actual losses in measurement would not be considered in simulation. It is observed that the simulation data and measurement results are close to each other and therefore the 2D simulation model used in this work is reliable.
From Fig.
At low current, by introducing BOX layer into Si-based SiGe HPT, as discussed above,the junction capacitance, including the collector–substrate capacitance Ccs, the base–collector capacitance Cbc, and the base–emitter capacitance Cbe, decreases obviously. At the same time, the collector resistance almost keeps unchanged. Both will result in the decrease of total transfer time of carriers from emitter to collector. Thus, the value of ft,opt increases significantly. At high current, the advantage of BOX layer on base–collector capacitance and base–emitter capacitance becomes weak as shown in Figs.
The maximum optical cut-off frequency fβ,opt, also called the 3-dB bandwidth, is another important quality factor to characterize the high frequency characteristics of HPT, which can be expressed as[17]
As shown in Fig.
Therefore, in the case of low power, the SOI-based SiGe HPT has a higher 3-dB bandwidth, which benefits from the significant advantage of BOX layer on the device capacitance. In the case of high power, because of a large number of photo-generated carriers in emitter and base, even in collector, the advantage of BOX layer on frequency characteristic becomes less obvious, the 3-dB bandwidths of both devices are almost the same. Therefore, the technologies such as increasing the gradient of Ge component in the base region or applying substrate bias voltage, may be considered to improve the working speed of the device in the future when it is used in high current areas.
In this paper, the working speed of SOI-based SiGe HPT and Si-based SiGe HPT are analyzed. By introducing BOX layer into the Si-based SiGe HPT, the collector–substrate capacitance Ccs of the SOI-based SiGe HPT is always smaller than that of the Si-based SiGe HPT. Both the base–collector junction capacitance and the base–emitter junction capacitance decrease dramatically only at low current, but not so obviously at high current. Therefore, at low current, the photo-characteristic frequency ft,opt of SOI-based SiGe HPT is evidently greater than that of Si-based SiGe HPT. Specifically, the maximum value of the photon-characteristic frequency ft,opt reaches up to 24.51 GHz, which is 1.5 times greater than that of Si-based SiGe HPT. Moreover, the 3-dB bandwidth of SOI-based SiGe HPT is larger than that of Si-based SiGe HPT at low current, the maximum 3-dB bandwidth of SOI-based SiGe HPT reaches up to 1.13 GHz, which achieves 1.18 times greater than that of Si-based SiGe HPT. However, at high current,the values of 3-dB bandwidth of two devices are almost the same, which is due to the difference in increasing speed and increasing magnitude between ft,opt and β0 in the operation current range. In summary, in the case of low power, the introduction of BOX layer exhibits dominant advantage in improving the working speed of SiGe HPT. In the case of high power, the advantage in improving the working speed of SiGe HPT becomes weak.
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